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Xillybus

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Xillybus

Project ID: 12611

Project information

Xilinx XPS IP core of the Xillybus DMA interface, configured with 4 FIFOs (two host to FPGA, two FPGA to host)

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April 25, 2015

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xillybus

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Copy SSH clone URLgit@gitlab.cs.pub.ro:etti/dcae-public/arh/research/utils/xillybus.git
Copy HTTPS clone URLhttps://gitlab.cs.pub.ro/etti/dcae-public/arh/research/utils/xillybus.git

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