From f6b07ea9034d93304e1b2fe6dee2e87e5bd4ec28 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?R=C4=83zvan-=C5=9Etefan=20COSTEA?=
 <razvan.costea2205@stud.acs.upb.ro>
Date: Sun, 30 Mar 2025 16:15:10 +0000
Subject: [PATCH] Fix mistake about DDRx bit significance

---
 slides/lectures/resources/gpio_avr/slides.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/slides/lectures/resources/gpio_avr/slides.md b/slides/lectures/resources/gpio_avr/slides.md
index 090b6ab..f1ee714 100644
--- a/slides/lectures/resources/gpio_avr/slides.md
+++ b/slides/lectures/resources/gpio_avr/slides.md
@@ -20,7 +20,7 @@ A simple GPIO
 
 <br>
 
-> <b> DDRx - Data Direction Register. </b> If the data direction bit is 1, the pin is an input. 0 is an output.
+> <b> DDRx - Data Direction Register. </b> If the data direction bit is 0, the pin is an input. 1 is an output.
 
 ```c
 DDRB &= ~(1<<DDB7); // Makes pin PB7 an input
-- 
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