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Commit 5e85dc90 authored by Lucian Petrică's avatar Lucian Petrică
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Fixed std_logic_vector to integer conversion for reg_index

parent b07887a8
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......@@ -110,7 +110,7 @@ signal ps_busy : std_logic;
begin
reg_index <= to_integer(signed(reg_addr(9 downto 2)));
reg_index <= to_integer(unsigned(reg_addr(9 downto 2)));
drp_en <= (reg_wren or reg_rden) and reg_addr(9) and (not drp_busy);
drp_we <= reg_wren and reg_addr(9);
......
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