Skip to content
GitLab
Explore
Sign in
Primary navigation
Search or go to…
Project
X
XillybusLite
Manage
Activity
Members
Code
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Locked files
Deploy
Releases
Package registry
Model registry
Operate
Terraform modules
Analyze
Contributor analytics
Repository analytics
Insights
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
ETTI
DCAE
ARH
Research
Utils
XillybusLite
Commits
master
Select Git revision
Branches
1
master
default
protected
1 result
xillybuslite
Author
Search by author
Any Author
authors
Andrei - Alexandru ULMĂMEI
alexandru.ulmamei
Calin BIRA
calin.bira
Radu HOBINCU
radu.hobincu
Vlad-Gabriel SERBU
vlad_gabriel.serbu
4 authors
May 09, 2015
Created a bus interface for the user* signals, to make it easier to connect peripherals in XPS
· ebe1b4cc
Lucian Petrică
authored
9 years ago
ebe1b4cc
May 08, 2015
Xillybus Lite pcore config files and netlist
· 34b4d594
Lucian Petrică
authored
9 years ago
34b4d594
Loading
